Noise & Signal Integrity

Noise & Signal Integrity

Noise floor, antenna temperature, system noise temperature, SNR, signal quality metrics, and mixed-signal layout.

Noise Floor & Thermal Noise

What is the thermal noise floor and where does −174 dBm/Hz come from? Basic
The thermal noise power spectral density at temperature T is:

N₀ = kT (Watts/Hz)

where k = 1.38 × 10⁻²³ J/K (Boltzmann’s constant). At room temperature (T = 290K):

N₀ = 1.38×10⁻²³ × 290 = 4.00×10⁻²¹ W/Hz = −174 dBm/Hz

This is the fundamental lower limit of noise power in any system at room temperature. It cannot be reduced by circuit design — only by cooling the system.

How do you calculate the noise floor in a given bandwidth? Basic
The total noise power in bandwidth B is:

N = kTB → N(dBm) = −174 + 10·log₁₀(B) dBm

Examples:

  • 1 Hz BW: −174 dBm
  • 1 kHz BW: −174 + 30 = −144 dBm
  • 1 MHz BW: −174 + 60 = −114 dBm
  • 20 MHz BW (LTE): −174 + 73 = −101 dBm
  • 100 MHz BW (5G NR): −174 + 80 = −94 dBm
What is noise figure (NF) and noise factor (F)? How are they related? Basic
Noise factor (F) is the ratio of the SNR at the input to the SNR at the output of a device (linear scale):

F = SNR_in / SNR_out (linear, always ≥ 1)

Noise figure (NF) is noise factor expressed in dB:

NF = 10·log₁₀(F) dB (always ≥ 0 dB)

A perfect noiseless device has NF = 0dB. A passive lossy component has NF equal to its insertion loss (e.g., a 3dB attenuator has NF = 3dB). NF tells you how much the device degrades the SNR of the signal passing through it.

What is the noise floor of a receiver with a given NF and bandwidth? Basic
The receiver noise floor is the thermal noise floor elevated by the system noise figure:

Noise Floor = −174 + 10·log₁₀(BW) + NF (dBm)

Example: A receiver with NF = 5dB and BW = 10MHz:

Noise Floor = −174 + 70 + 5 = −99 dBm

Any signal below this level is buried in noise and cannot be reliably detected.

What is the difference between noise floor and sensitivity? Intermediate
Noise floor is the total noise power at the receiver input (kTB + NF). Sensitivity is the minimum signal level required to achieve a target quality metric (BER, EVM, etc.):

Sensitivity = Noise Floor + SNR_required

Sensitivity is always higher (less negative) than the noise floor, because you need some minimum SNR above the noise to demodulate the signal. The required SNR depends on the modulation scheme — BPSK needs ~7dB, 64QAM needs ~22dB, 256QAM needs ~28dB.

If I add two noise sources of −100 dBm each, what is the total noise power? Intermediate
Noise powers add in the linear domain, not in dB:

P_total = P₁ + P₂ = 10⁻¹⁰ + 10⁻¹⁰ = 2 × 10⁻¹⁰ mW
P_total(dBm) = 10·log₁₀(2 × 10⁻¹⁰) = −100 + 3 = −97 dBm

Adding two equal uncorrelated noise sources always increases the total by 3dB. This is why you must add powers linearly, not in dB, when combining noise contributions.

Antenna Temperature & System Noise Temperature

What is antenna noise temperature? Intermediate
Antenna noise temperature (T_A) is not the physical temperature of the antenna — it represents the noise power received by the antenna from all sources in its environment, expressed as an equivalent temperature:

T_A = (1/4π) ∫∫ T_b(θ,φ) · G(θ,φ) dΩ

where T_b(θ,φ) is the brightness temperature distribution of the surroundings and G(θ,φ) is the antenna pattern. Sources contributing to T_A include:

  • Sky noise: Cosmic microwave background (~3K), galactic noise (varies with frequency and direction)
  • Atmospheric noise: Oxygen and water vapor absorption (significant above 10GHz)
  • Ground noise: Earth’s thermal radiation (~290K for sidelobes pointing at ground)
  • Man-made noise: EMI, industrial noise (dominant at lower frequencies)
What is system noise temperature and how does it relate to noise figure? Intermediate
System noise temperature (T_sys) is the total equivalent noise temperature at the system input:

T_sys = T_A + T_receiver

where T_receiver is the receiver’s equivalent noise temperature. The relationship between noise temperature and noise figure is:

T_e = T₀ · (F − 1) = 290 · (10^(NF/10) − 1)

Examples: NF = 1dB → T_e = 75K. NF = 3dB → T_e = 290K. NF = 7dB → T_e = 1163K.

For radio astronomy and satellite communications, noise temperature is preferred over NF because it gives a clearer picture when the antenna temperature is far from 290K.

Why do satellite ground stations and radio telescopes use cryogenically cooled LNAs? Advanced
In satellite and radio astronomy systems, the signals are extremely weak, and the antenna temperature can be very low (T_A ≈ 10–50K when pointing at cold sky). The receiver noise must be comparable to or less than the antenna noise to avoid dominating the system noise:

T_sys = T_A + T_receiver

If T_A = 20K and T_receiver = 290K (NF = 3dB), the receiver contributes 93% of the system noise. By cooling the LNA to cryogenic temperatures (15–20K), T_receiver can be reduced to ~5–10K, making the system limited by the sky noise rather than the receiver. This can improve sensitivity by 10–15dB compared to an uncooled receiver.

How does antenna noise temperature change with elevation angle? Advanced
When an antenna points at different elevation angles:

  • Zenith (straight up): T_A is lowest — the antenna sees cold sky (~3K cosmic background + atmospheric contribution). At 10GHz, T_A ≈ 10–15K at zenith.
  • Horizon (0° elevation): T_A is highest — the antenna sees more atmosphere (longer path length) and ground noise from sidelobes. T_A can reach 100–250K.
  • Below horizon: T_A approaches 290K (ground temperature).

This is why satellite dishes are designed with low sidelobes toward the ground and why G/T (gain-to-noise-temperature ratio) is a critical figure of merit for satellite earth stations.

What is G/T and why is it used as a figure of merit for receive systems? Advanced
G/T (gain-to-noise-temperature ratio) characterizes the sensitivity of an entire receive system in a single number:

G/T = G_antenna (dBi) − 10·log₁₀(T_sys) (dB/K)

It captures both the antenna’s ability to collect signal (G) and the system’s noise performance (T_sys). A higher G/T means better ability to receive weak signals.

G/T is used rather than NF alone because it accounts for the antenna’s noise contribution, which is critical for satellite and deep-space communications where the antenna temperature varies significantly with pointing direction.

Noise Sources in Circuits

Main noise sources in a CMOS op-amp — which dominates at low frequencies? Intermediate
  • Thermal noise: White noise from channel resistance, proportional to kT. Flat across frequency. Power spectral density: 4kTR (V²/Hz).
  • Flicker (1/f) noise: Due to charge trapping in the gate oxide. Dominates at low frequencies with a 1/f spectral shape. Corner frequency is typically 100Hz–1MHz depending on process and transistor sizing.
  • Shot noise: From gate leakage current (usually negligible in CMOS compared to BJT). PSD: 2qI (A²/Hz).

At low frequencies, flicker noise dominates. It can be reduced by using larger transistor areas (W×L) for the input pair, or circuit techniques like chopper stabilization or auto-zeroing.

What is thermal noise (Johnson-Nyquist noise)? Basic
Thermal noise is generated by random thermal motion of charge carriers in any resistive material. It is:

  • White: Flat power spectral density across all frequencies (up to ~THz)
  • Gaussian: Amplitude follows a normal distribution
  • Unavoidable: Present in any resistor at T > 0K
V_n = √(4kTRB) (RMS voltage noise)
I_n = √(4kTB/R) (RMS current noise)

Example: A 50Ω resistor at 290K in 1MHz bandwidth: V_n = √(4 × 1.38×10⁻²³ × 290 × 50 × 10⁶) ≈ 0.9µV RMS.

What is shot noise and when is it important? Intermediate
Shot noise arises from the discrete nature of electric charge crossing a potential barrier (PN junction, Schottky barrier). Each carrier crossing is a random event:

I_n = √(2qIB)

where q = 1.6×10⁻¹⁹ C and I is the DC current. Shot noise is:

  • White: Flat spectral density
  • Important in: Diodes, BJT base current, photodetectors, any device where current flows across a barrier
  • Not present in: Simple resistors (which have thermal noise instead) or MOSFET drain current (where carriers don’t cross a barrier in the classical sense)
What is the 1/f noise corner frequency and why does it matter? Intermediate
The 1/f corner frequency (f_c) is where the flicker noise power spectral density equals the thermal noise floor. Below f_c, flicker noise dominates; above f_c, thermal noise dominates.

Why it matters:

  • Sets the lower limit of useful bandwidth for direct-conversion receivers (DC offset and 1/f noise corrupt baseband signals near DC).
  • In oscillators, 1/f noise upconverts to close-in phase noise — lower f_c means better phase noise.
  • BJTs typically have much lower f_c (~100Hz–1kHz) than MOSFETs (~100kHz–10MHz), making BJTs preferred for low-frequency, low-noise applications.
What is phase noise and how does it relate to 1/f noise in oscillators? Advanced
Phase noise is the random fluctuation of an oscillator’s output phase, characterized as the noise power spectral density relative to the carrier at a given offset frequency, in dBc/Hz.

The phase noise profile has distinct regions:

  • 1/f³ region: Very close to carrier — caused by 1/f noise upconverting through the oscillator’s nonlinearity. Slope: −30dB/decade.
  • 1/f² region: Intermediate offsets — caused by thermal noise inside the oscillator loop. Slope: −20dB/decade. This is the Leeson model region.
  • Flat region: Far from carrier — the oscillator’s broadband thermal noise floor.
Leeson’s equation: L(f_m) = 10·log[(2FkT/P_s) · (1 + (f₀/2Qf_m)²) · (1 + f_c/f_m)]

Lower device 1/f noise → lower close-in phase noise. Higher loaded Q → better phase noise at all offsets.

SNR & Signal Quality Metrics

Calculate theoretical SNR of a 12-bit ADC with 2V full scale. Basic
SNR = 6.02N + 1.76 dB = 6.02(12) + 1.76 = 74.0 dB

This is the theoretical maximum SNR limited only by quantization noise, assuming a full-scale sinusoidal input. The full-scale voltage (2V) doesn’t affect this — it’s purely a function of the number of bits. Real ADCs achieve lower SNR due to thermal noise, DNL/INL, clock jitter, etc.

What is ENOB and how does it relate to SINAD? Intermediate
ENOB (Effective Number of Bits) captures the actual performance of an ADC including all noise and distortion sources:

ENOB = (SINAD − 1.76) / 6.02

where SINAD (Signal-to-Noise-and-Distortion ratio) includes both noise and harmonic distortion. A 12-bit ADC might have ENOB of only 10.5 bits at high input frequencies due to jitter, nonlinearity, and thermal noise.

ENOB is the single best metric for comparing ADC dynamic performance — it tells you how many “real bits” of information the ADC actually delivers.

What is SFDR and why is it important? Intermediate
SFDR (Spurious-Free Dynamic Range) is the ratio of the fundamental signal power to the power of the largest spurious component (harmonic or intermodulation product):

SFDR = P_fundamental − P_worst_spur (dBc)

SFDR is critical because it determines the usable dynamic range for detecting weak signals in the presence of strong ones. A receiver with high SNR but poor SFDR will still fail if a strong signal creates spurs that mask a weak desired signal. SFDR is often the limiting factor in multi-carrier and wideband systems.

What is EVM and what does it tell you about system performance? Intermediate
EVM (Error Vector Magnitude) measures the deviation of received constellation points from their ideal positions:

EVM = √(P_error / P_reference) × 100%

EVM captures the combined effect of all impairments: noise, phase noise, IQ imbalance, nonlinearity, frequency offset, and timing errors. It is the primary metric for modulated signal quality in modern wireless standards (LTE, 5G, Wi-Fi). Typical requirements: QPSK ~17%, 16QAM ~12%, 64QAM ~8%, 256QAM ~3.5%.

Mixed-Signal Layout & Signal Integrity

Mixed-signal chip layout: how to partition die with ADC and digital logic? Intermediate
  • Physical separation: Place analog and digital blocks on opposite sides of the die with guard rings between them.
  • Separate power domains: Independent VDD/VSS for analog and digital, connected at a single point (star ground) at the package level.
  • Substrate isolation: Deep N-well or triple-well to prevent digital switching noise from coupling through the substrate.
  • Clock routing: Shield sensitive analog signal lines from digital clocks. Route clocks away from analog inputs.
  • Decoupling: On-die decoupling caps for both domains, placed close to the circuits they serve.
What is crosstalk and how do you minimize it on a PCB? Intermediate
Crosstalk is unwanted coupling between adjacent signal traces via capacitive (electric field) and inductive (magnetic field) mechanisms. Two types:

  • Near-End Crosstalk (NEXT): Measured at the same end as the aggressor signal source. Caused by both capacitive and inductive coupling (they add).
  • Far-End Crosstalk (FEXT): Measured at the opposite end. Capacitive and inductive components partially cancel in stripline but add in microstrip.

Minimization: Increase trace spacing (3× trace width rule), use ground planes, reduce parallel run lengths, route sensitive traces on different layers with orthogonal orientation, use differential pairs, and add guard traces with via stitching.

What causes ground bounce and how does it affect mixed-signal systems? Advanced
Ground bounce (simultaneous switching noise, SSN) occurs when multiple digital outputs switch simultaneously, causing large transient currents through the parasitic inductance of ground pins/vias/traces:

V_bounce = L_parasitic × dI/dt

This momentarily shifts the local ground reference voltage, which:

  • Causes false triggering of digital inputs with tight noise margins
  • Injects noise into analog circuits sharing the same ground reference
  • Degrades ADC performance by corrupting the reference voltage

Mitigation: Multiple ground pins/vias to reduce inductance, staggered output switching, lower slew rate drivers, separate analog and digital ground planes joined at a single point, and adequate decoupling.

ADC shows good DC performance but degrades at higher frequencies — three possible causes? Advanced
  1. Clock jitter (aperture jitter): Timing uncertainty in the sampling clock translates to amplitude noise. Impact scales with input frequency: SNR_jitter = −20·log(2πf_in·t_j). At 100MHz input, even 1ps jitter limits SNR to ~56dB.
  2. Bandwidth limitation of the sample-and-hold: Insufficient settling time at high frequencies causes incomplete acquisition, degrading SFDR and SINAD.
  3. Input buffer/driver bandwidth: If the ADC driver amplifier has insufficient bandwidth or slew rate, it distorts the signal before sampling. The input network’s RC time constant may also be too slow for the input frequency.
How does clock jitter limit ADC performance? Derive the relationship. Advanced
For a sinusoidal input V(t) = A·sin(2πf_in·t), sampling time error Δt causes a voltage error:

ΔV = dV/dt × Δt = 2πf_in·A·cos(2πf_in·t) × Δt

The RMS voltage error is: ΔV_rms = 2πf_in · A · σ_j / √2, where σ_j is the RMS jitter.

SNR_jitter = −20·log₁₀(2πf_in · σ_j)

This is independent of the ADC resolution — jitter creates a hard ceiling on achievable SNR that increases by 6dB for every doubling of input frequency. Example: for 1ps RMS jitter at 1GHz input, SNR_jitter ≈ 44dB (effectively ~7 ENOB).

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